Homemade 100VA to 1000VA Grid-tie Inverter Circuit

The following concept I have explained a simple yet viable solar grid tie inverter circuit which can be modified appropriately for generating wattage from 100 to 1000 VA and above.

What's a grid tie inverter

It's an inverter system designed to work just like an ordinary inverter using a DC input power with an exception that the output is fed back to the utility grid.

This added power to the grid may be intended for contributing to the ever increasing power demands and also for generating a passive income from the utility company in accordance with their terms (applicable in limited countries only).

For implementing the above process, it's ensured that the output from the inverter is perfectly synchronized with grid power in terms of RMS, waveform, frequency and polarity, for preventing unnatural behavior and issues.

The proposed concept designed by me, is yet another grid tie inverter circuit (not verified) which is even simpler and reasonable than the previous design.

The circuit may be understood with the help of the following points:

How the GTI Circuit Works

AC mains from the grid system is applied to TR1 which is a stepped down transformer.

TR1 drops the mains input to 12V and rectifies it with the help of the bridge network formed by the four 1N4148 diodes.

The rectified voltage is used for powering the ICs via the individual 1N4148 diodes connected across the relevant pinouts of the ICs, while the associated 100uF capacitors make sure that the voltage is appropriately filtered.

The rectified voltage acquired just after the bridge is also used as the processing inputs for the two ICs.

Since the above signal (see the waveform image #1) is unfiltered it consists of a frequency of 100Hz and becomes the sample signal for processing and enabling the required synchronization.

First it's fed to pin#2 of IC555 where it's frequency is used for comparing with the sawtooth waves (see waveform #2) across pin#6/7 obtained from the collector of the transistor BC557.

The above comparison enables the IC to create the intended PWM output in sync with the frequency of the grid mains.

The signal from the bridge is also fed to pin#5 which fixes the RMS value of the output PWM precisely matching with the grid waveform (see waveform #3).

However at this point the output from the 555 is a low in power and needs to be boosted and also processed such that it replicates and generates both the halves of the AC signal.

For executing the above, the 4017 and the mosfet stage is incorporated.

The 100Hz/120Hz from the bridge is also received by the 4017 at its pin#14 which means now it's output would sequence and repeat from pin#3 back to pin#3 such that the mosfets are switched in tandem and exactly at the frequency of 50Hz, meaning each mosfet would conduct 50 times per second, alternately.

The mosfets respond to the above actions from the IC4017 and generate the corresponding push pull effect over the connected transformer which in turn produces the required AC mains voltage at its secondary winding.

This may be implemented by supplying a DC input to the mosftes from a renewable source or a battery.

However the above voltage would be an ordinary square wave, not corresponding to the grid waveform, until and unless we include the network comprising the two 1N4148 diodes connected across the gates of the mosfets and pin#3 of IC555.

The above network chops the square waves at the gates of the mosftes accurately with respect to the PWM pattern or in other words it carves the square waves exactly matching the grid AC waveform, albeit in PWM form (see waveform #4).

The above output now is fed back to the grid conforming the grid specs and patterns accurately.

The power output can be altered right from 100 watts to 1000 watts or even more by appropriately dimensioning the input DC, the mosfets and the transformer ratings.

The discussed solar grid tie inverter circuit remains operative only so long as the grid power is present, the moment utility mains fails, TR1 switches OFF the input signals and the entire circuit comes to a halt, a situation that's strictly imperative for grid-tie inverter circuit systems.

Warning: The author cannot be held responsible for the results of the experiment. Please do it at your own risk!! The projects explained here are recommended only for the experts in the field of electronics.

Circuit Diagram

Assumed Waveform Images

Something's not right in the above design

According to Mr. Selim Yavuz the above design had a few things which looked doubtful and needed correction, let's hear what he had to say:

Hi Swag,

hope you're well.

I tried your circuit on a bread board. It seems to work except pwm part. For some reason, I get a double hump but no real pwm. Could you please help me understand how 555 does pwm? I noticed that 2.2k and 1u create a ramp of 10ms. I believe the ramp should be much faster than that as the half wave is 10ms. May be I missed a few things.

Also, 4017 does a clean job switching happily back and forth. When you power up, the 100 hz clock makes the counter always start from 0. How can we assure that it always in phase with the grid?

Appreciate your help and ideas.
Regards,
Selim

Solving the Circuit Issue

Hi Selim,

Thanks for the update.
You are absolutely correct, the triangle waves should be much higher in frequency compared to the modulation input at pin#5.
For this we could go for a separate 300Hz (approximately) 555 IC astable for feeding pin2 of the pwm IC 555.
This will solve all the issues according to me.
The 4017 should be clocked via 100Hz received from bridge rectifier and its pin3, pin2 should be used for driving the gates and pin4 connected to pin15. This will ensure perfect synchronization with the mains frequency.
Regards.

Finalized Design as per the above conversation

The above diagram has been redrawn below with distinct part numbers and jumper notations

WARNING: THE IDEA IS BASED SOLELY ON IMAGINATIVE SIMULATION, VIEWER DISCRETION IS STRICTLY ADVISED.

A major issue with the above design faced by many of the constructors was the heating up of one of the mosfets during the GTI operations. A possible cause and remedy as suggested by Mr. Hsen is presented below.

The proposed correction in the mosfet stage as recommended by Mr. Hsen is also enclosed here under, hopefully the said modifications will help control the issue permanently:

Hello mr. Swagatam:

I watched again your diagram and I am firmly convinced that the gates of the MOSFETs will reach a modulating signal (HF PWM) and not a simple signal 50 cs. Therefore I insist, a more powerful driver the CD4017 must be incorporated, and the series resistance should be of a much lower value.

Another thing to consider is that at the junction of the resistor and the gate should not be another added element, and in this case I see going to the diodes 555.

Because this may be the reason why one of the heats MOFETs because it can self oscillate. So I think that the mosfet heats because it is oscillating and not because of the output transformer.

Excuse me, but my concern is that your project succeed because I feel very good and it is not my intention to criticize.

Yours affectionately, hsen

Improved Mosfet Driver

As per the suggestions from Mr Hsen, the following BJT buffer could be employed for ensuring that the mosfets are able to work with better safety and control.

Ideally it is strictly recommended to calculate all the parameters before designing a proper Grid Tie inverter. Below explained are the key formulas and calculations pertaining to grid-tie inverters which includes power, voltage, and efficiency parameters:

Power Flow in Grid-Tie Inverters

Grid-tie inverters are designed to inject power into the grid while maintaining grid synchronization. The key relationship for power flow can be given as:

• P_in = P_out + P_loss

Where:

• P_in = Input power from the DC source (like a solar panel)
• P_out = Output power injected into the grid
• P_loss = Power losses in the inverter (maybe due to switching, conduction, and transformer losses)

Inverter Efficiency

The efficiency of a grid-tie inverter could be defined as:

• Efficiency (%) = (P_out / P_in) × 100

Where:

• P_out = AC power output to the grid
• P_in = DC power input from the source

You can normally assume grid-tie inverters to have have efficiencies between 90%–98%.

Power Factor (PF)

Grid-tie inverters normally needs to operate at a high power factor to ensure efficient power transfer to the grid. The power factor can be calculated as:

• PF = P_out / (V_rms × I_rms)

Where:

• P_out = Real power output (W)
• V_rms = RMS grid voltage (V)
• I_rms = RMS current injected into the grid (A)

Ideally for any grid-tie inverter you must try to get a PF ≈ 1 (purely resistive load).

Maximum Power Point Tracking (MPPT)

Grid-tie inverters configured with MPPT can adjust the input voltage to maximize power extraction from the source. The key equation for calculating maximum power can be calculated using the formula:

• P_max = V_mp × I_mp

Where:

• P_max = Maximum power output of the DC source (W)
• V_mp = Voltage at maximum power point (V)
• I_mp = Current at maximum power point (A)

Sizing the Inverter

Always make sure the inverter is rated to handle the peak power of the DC source. For a solar panel integration, you can use the following formula:

• P_inv = P_array / η_inverter

Where:

• P_inv = Rated power of the inverter (W)
• P_array = Total power of the solar array (W)
• η_inverter = Efficiency of the inverter (decimal)

Lets solve an Example Grid tie Problem as given below:

Consider we have an solar panel array rated at 5 kW and the inverter efficiency is 95% then the inverter should have a rating of:
P_inv = 5000 / 0.95 ≈ 5263W

RMS Voltage and Current

The RMS values of voltage and current injected into the grid can be calculated as:

• V_rms = V_peak / √2
• I_rms = I_peak / √2

Where:

• V_peak = Peak voltage of the AC waveform (V)
• I_peak = Peak current of the AC waveform (A)

Synchronization with the Grid AC Line

We have to ensure that the inverter must match the grid's voltage, frequency, and phase to inject power. The key relationship is given by the formula:

• Grid Frequency = Inverter Frequency

Total Harmonic Distortion (THD)

The inverter must be designed to minimize the harmonic distortion in the current injected into the grid. This THD can be calculated as:

• THD (%) = (√(I₂² + I₃² + ... + I_n²) / I₁) × 100

Where:

• I₁ = Fundamental frequency current
• I₂, I₃, ..., I_n = Harmonic currents

In order to comply with the terms of the grid supply network, make sure the THD is typically less than 5%.

DC Link Capacitor Sizing

In grid-tie inverters we use the DC link capacitor to smooth the input DC voltage. Its value can be estimated as:

• C_dc = I_load / (4 × f × Δ_Vdc)

Where:

• C_dc = DC link capacitance (F)
• I_load = Load current (A)
• f = AC grid frequency (Hz)
• Δ_Vdc = Allowed ripple in DC link voltage (V)

Transformer Turns Ratio

If you are using a transformer in your grid-tie inverter for isolation then the turns ratio can be calculated as:

• N = _Vgrid / V_dc

Where:

• N = Turns ratio
• V_grid = RMS grid voltage (e.g., 230V or 120V)
• V_dc = DC input voltage

Reactive Power (Q)

Your inverters can inject reactive power in the grid so if required you can calculate it as:

• Q = V_rms × I_rms × sin(θ)

Where:

• θ = Phase angle between voltage and current

Grid Current Calculation

The current injected into the grid can be calculated using Ohms law as:

• I_grid = P_out / V_rms

Example Calculations

Example 1: Efficiency Calculation

• Input power (P_in): 5000W
• Output power (P_out): 4800W

Efficiency = (P_out / P_in) × 100

= (4800 / 5000) × 100 = 96%

Example 2: RMS Current

• P_out = 4800W
• V_rms = 230V

I_rms = P_out / V_rms

= 4800 / 230 ≈ 20.87A