In this article we learn how to make a multilevel (5 step) cascaded inverter circuit using a very simple concept developed by me. Let's learn more regarding the details.
The Circuit Concept
In this website so far I have developed, designed and introduced many sine wave inverter circuits using straightforward concepts and ordinary components such as IC 555, which happen to be more result oriented instead of being complex and full of theoretical jumbles.
I have explained how simply a high power audio amplifier can be converted into a pure sine wave inverter, and I have also covered comprehensively regarding sine wave inveters using SPWM concept as given below:
We have also learned through this website regarding how to convert any square inverter into a pure sine wave inverter design.
Assessing the above sine wave inverter circuits using sine equivalent PWMs, we understand that the waveform of SPWMs do not directly match or coincide with an actual sinusoidal waveform, rather these execute the sine wave effect or results by interpreting the RMS value of the actual sine wave AC.
Although SPWM can be considered an effective way of replicating and implementing a reasonably pure sine wave, the fact that it does not simulate or coincide with a real sine wave makes the concept a little unsophisticated, especially if compared to a 5 Level cascaded sine wave inverter concept.
We can compare and analyze the two types of sine wave simulation concepts by referring to the following images:
Multilevel Cascaded Waveform Image
We can clearly see that the multilevel 5 step cascaded concept produces a more obvious and effective simulation of a real sine wave than the SPWM concept which relies solely on matching the RMS value with the original sine wave magnitude.
Designing a conventional 5 Level Cascaded sine wave Inverter can be quite complex, but the concept which is explained here makes the implementation easier and employs ordinary components.
Referring to the image above, we can see how simply the 5 level cascaded inverter concept can be practically implemented using just a muti-tap transformer, a couple of 4017 ICs and 18 power BJTs, which could be easily replaced with mosfets if required.
Here a couple of 4017 ICs which are Johnson's 10 stage counter divider chips, are cascaded to produce a sequentially running or chasing logic highs across the shown pinouts of the ICs.
These sequentially running logic are used for triggering the connected power BJTs in the same sequence which in turn switch the transformer winding in an order which causes the transformer to produce a cascaded kind of sine equivalent waveform.
The transformer forms the heart of the circuit and employs a specially wounded primary with 11 taps. These taps are simply extracted uniformly from a single long calculated winding.
The BJTs associated with one of the ICs switch one of the halves of the transformer through 5 taps enabling the generation of 5 level steps, constituting one half cycle of the AC waveform, while the BJTs associated with the other ICs does the identical function to shape up the lower half AC cycle in the form of 5 level cascaded waveform.
The ICs are run by clock signals applied to the indicated position in the circuit, which could be acquired from any standard 555 IC astable circuit.
The first 5 sets of the BJTs build up the 5 levels of the waveform, the remaining 4 BJTs switch the same in reverse order to complete the cascaded waveform having a total of 9 skyscrapers.
These skyscrapers are formed by producing an ascending and descending voltage levels by the switching of the corresponding winding of the transformer which are rated at the relevant voltage levels
For example, winding #1 could be rated at 150V with respect to the center tap, the winding #2 at 200V, winding #3 at 230V, winding #4 at 270V and winding #5 at 330V, so when these are switched sequentially by the set of the shown 5 BJTs, we get the first 5 levels of the waveform, next when these winding are switched in reverse by the following 4 BJTs it creates the descending 4 level waveforms, thus completing the upper half cycle of the 220V AC.
The same is repeated by the other 9 BJTs associated with the other 4017 IC giving rise to the lower half of the 5 level cascaded AC, which completes one complete AC waveform of the required 220V AC output.
Transformer Winding Details:
As may be witnessed in the above diagram, the transformer is an ordinary iron core type, made by winding the primary and the secondary with turns corresponding to the indicated voltage taps.
When connected with the corresponding BJTs these winding can be expected to induce a 5 level or a total of 9 level of cascaded waveform wherein the first 36V winding would correspond and induce a 150V, the 27V would induce an equivalent of 200V, while the 20V, 27V, 36V would be responsible of producing 230V, 270V and 330V across the secondary winding in the proposed cascaded format.
The set of taps on the lower side of the primary would carry out the switching to complete 4 ascending levels of the waveform.
An identical procedure would be repeated by the 9 BJTs associated with the complementary 4017 IC for building the negative half cycle of the AC...the negative is rendered due to the opposite orientation of the transformer winding with respect to the center tap.
Complete circuit diagram of the discussed multi-level sinewave inverter circuit
NOTE: Please add a 1uF/25 capacitor across pin#15 and pin#16 lines of the ICs, otherwise the sequencing will not initiate.
The 1M pot associated with the 555 circuit will need to be adjusted for setting up a 50Hz or a 60Hz frequency for the inverter as per the country specs of the user.
All unspecified resistors are 10k, 1/4 watt
All diodes are 1N4148
All BJTs are TIP142
ICs are 4017
You may also want to refer to the construction and test report of the above step inverter design