In this post we learn how to make 2 accurate long duration timer circuits ranging from 4 hours to 40 hours, which can be upgraded further for getting even longer delays. The concepts are fully adjustable.
A timer in electronics is essentially a device which is used for producing time delay intervals for switching a connected load. The time delay is set externally by the user as per the requirement.
Please remember that you can never produce long accurate delays using only a single 4060 IC or any CMOS IC.
I have confirmed practically that beyond 4 hours IC 4060 begins deviating from its accuracy range.
IC 555 as a delay timer is even worse, it's almost impossible to get accurate delays even for an hour from this IC.
This inaccuracy is mostly due to capacitor leakage current, and inefficient discharging of the capacitor.
So beware of misleading designs and concepts.
ICs like 4060, IC 555, etc basically generate oscillations which are adjustable right from a few Hz to many Hz.
Unless these IC are integrated with another divider counter device such as IC 4017, getting very high accurate time intervals may not be feasible. For getting 24 hour, or even days and week intervals you will have integrate a divider/counter stage as shown below.
In the first circuit we see how two different modes of ICs can be coupled together to form an effective long duration timer circuit.
1) Circuit Description
Referring to the circuit diagram.
- IC1 is an oscillator counter IC consisting a built in oscillator stage and generates clock pulses with varying periods across its pins 1,2,3,4,5,6,7,9,13,14,15.
- The output from pin 3 produces the longest time interval and therefore we select this output for feeding the next stage.
- The pot P1 and the capacitor C1 of IC1 can be used for adjusting the time span at it pin 3.
- The higher the setting of the above components the longer the period at pin #3.
- The next stage consists of decade counter IC 4017 which does nothing but increase the time interval obtained from IC1 to ten folds. It means if the the time interval generated by IC1s pin #3 is 10 hours, the time generated at pin #11 of IC2 would be 10*10 = 100 hours.
- Similarly if the time generated at pin #3 of IC1 is 6 minutes, would mean a high output from pin#11 of IC1 after 60 minutes or 1 hour.
- When power is switched ON, capacitor C2 makes sure that the reset pins of both the ICs are appropriately reset, so that the ICs begin counting from zero rather than from some irrelevant intermediate figure.
- As long as the counting progresses, pin #11 of IC2 remains at logic low, such that the relay driver is held switched OFF.
- After the set timing lapses, pin#11 of IC2 goes high activating the transistor/relay stage and the subsequent load connected with the relay contacts.
- The diode D1 ensures that the output from pin#11 of IC2 locks the counting of IC1 by providing a feed back latch signal at its pin #11.
Thus the whole timer latches until the timer is switched OFF and restarted again for repeating the entire process.
R1, R3 = 1M
R2, R4 = 12K,
C1, C2 = 1uF/25V,
D1, D2 = 1N4007,
IC1 = 4060,
IC2 = 4017,
T1 = BC547,
POT = 1M linear
RELAY = 12V SPDT
Formula for Calculating Delay output for IC 4060
Delay Period = 2.2 Rt.Ct.2(N -1)
Frequency = 1 / 2.2 Rt.Ct
Rt = P1 + R2
Ct = C1
R1 = 10(P1+R2)
Adding Selector Switch and LEDs
The above design could be further enhanced with a selector switch and sequential LEDs, as indicated in the following diagram:
How it Works
The main element of the timing circuit is a 4060 CMOS device, which is made up of an oscillator along with a 14 stage divider.
The frequency of the oscillator could be tweaked through potentiometer P1 in order that the output at Q13 is around a single pulse each hour.
The period of this clock beat could be extremely quick (around 100 ns), as it additionally resets the whole 4060 IC by way of diode D8.
The 'once each hour' clock pulse is given to the 2nd (divide-by-ten) counter, the 4017 IC. One of several outputs of this counter is going to be logic high (logic one) at any given instant.
When the 4017 is reset, output Q0 goes high. Right after one hour, output Q0 will turn low and output Q1 may become high, etc. Switch S1 as a result allows the user to choose a time interval through one to six hours.
When the chosen output becomes high, the transistor turns off and the relay gets switched OFF (thus turning off the connected load).
Once the enable input of the 4017 is furthermore attached to the wiper of S1 any succeeding clock pulses turns out to have no impact on ihe counter. The device will consequently continue to be in the switched OFF condition until the reset switch is presed by the user.
The 4050 CMOS buffer IC along with the 7 LEDs are incorporated to offer indication of the range of hours which may have essentially elapsed. These parts could, obviously, be removed in case an lapsed time display is not needed.
The source voltage for this circuit is not really crucial and could be cover anything from 5 and 15 V, The current usage of the circuit, excluding the relay, will be in the range of 15 mA.
It is advisable to pick a source voltage that may be matching the specifications of the relay, to ensure that any problems are avoided. The BC 557 transistor can handle a current of 70 mA, so make sure the relay coil voltage is rated withing this current range
2) Using Only BJTs
The next design explains a very long duration timer circuit which uses only a couple of transistors for the intended operations.
Long duration timer circuits normally involve ICs for the processing because executing long duration delays requires high precision and accuracy which is possible only using ICs.
Achieving High Accuracy Delays
Even our very own IC 555 becomes helpless and inaccurate when long duration delays are expected from it.
The encountered difficulty for sustaining high accuracy with long duration is basically the leakage voltage issue, and the inconsistent discharging of the capacitors which leads to wrong starting thresholds for the timer producing errors in the timing for each cycles.
The leakages and inconsistent discharge issues become proportionately bigger as the capacitor values get bigger which becomes imperative for obtaining long intervals.
Therefore making a long duration timers with ordinary BJTs could be almost impossible as these devices alone could be too basic and cannot be expected for such complex implementations.
So How can a Transistor Circuit Produce Long Accurate Duration Time Intervals?
The following transistor circuit handles the above discussed issues credibly and can be used for acquiring long duration timing with reasonably high accuracy (+/-2%).
It's simply due to effective discharging of the capacitor on every new cycle, this ensures that the circuit begins from zero, and enables accurate identical time periods for the selected RC network.
The circuit may be understood with the help of the following discussion:
How it Works
A momentary push of the push button charges the 1000uF capacitor fully and triggers the NPN BC547 transistor, sustaining the position even after the switch is released due to the slow discharging of the 1000uF via the 2M2 resistor and the emitter of the NPN.
Triggering of the BC547 also switches ON the PNP BC557 which in turns switches ON the relay and the connected load.
The above situation holds on as long as the 1000uF is not discharged below the cut off levels of the the two transistors.
The above discussed operations are quite basic and make an ordinary timer configuration which may be too inaccurate with its performance.
How the 1K and 1N4148 Work
However the addition of the 1K/1N4148 network instantly the transforms the circuit into a hugely accurate long duration timer for the following reasons.
The 1K and the 1N4148 link ensures that each time the transistors break up the latch due to insufficient charge in the capacitor, the residual charge inside the capacitor is forced to discharge fully through the above resistor/diode link via the relay coil.
The above feature makes sure that the capacitor is completely drained off and empty for the next cycle and thus is able to produce a clean start from zero.
Without the above feature the capacitor would be unable to discharge completely and the residual charge inside would induce undefined start points making the procedures inaccurate and inconsistent.
The circuit could be even further enhanced by using a Darlington pair for the NPN allowing the use of much higher value resistors at its base and proportionately low value capacitors. Lower value capacitors would produce lower leakages and help to improve the timing accuracy during the long duration counting periods.
How to Calculate the Component Values for the Desired Long Delays:
Vc = Vs(1 - e-t/RC)
- Vc is the voltage across the capacitor
- Vs is the supply voltage
- t is the elapsed time since the application of the supply voltage
- RC is the time constant of the RC charging circuit
Long Duration Timer using Op Amps
The disadvantage of all analogue timers (monostable circuits) is that, in an effort to achieve fairly long time periods, the RC time constant needs to be correspondingly substantial.
This inevitably implies resistor values of greater than 1 M, that may result in timing mistakes caused by stray leakage resistance within the circuit, or substantial electrolytic capacitors, that similarly can create timing problems because of their leakage resistance.
The op amp timer circuit shown above accomplishes timing periods as much as 100 times more time compared to those accessible using regular circuits.
It achieves this by lowering the capacitor charging current through a factor of 100, consequently improving the charging time drastically, without requiring high value charging capacitors. The circuit works in the following way:
When the start/reset button is clicked C1 gets discharged and this causes output of op amp IC1, which is configured as a voltage follower, to become zero volts. The inverting input of comparator IC2 is at a reduced voltage level than the non -inverting input, hence the output of IC2 moves high.
The voltage around R4 is around 120 mV, which means that C1 charges via R2 with a current of approximately 120 nA, which apprers to be 100 times less than what could be attained in case R2 had been attached direct to positive supply.
Needless to say, if C1 had been charged through a consistent 120 mV it could rapidly achieve this voltage, and stop charging any further.
However, the lower terminal of R4 being fed back to the output of IC1 ensures that as the voltage across C1 goes up so does the output voltage and therefore the charging voltage given to R2.
Once the output voltage climbs to approximately 7.5 volts it surpasses the voltage refernced at the non-inverting input of IC2 by R6 and R7, and the output of IC2 becomes low.
A tiny quantity of positive feedback supplied by R8 inhibits any kind of noise existing on the output of IC1 from getting boosted by IC2 as it moves from the trigger point, because this normally produce false output pulses. The timing length can be calculated by the equation:
T = R2 C1( 1 + R5/R4 + R5/R2) x C2 x ( 1 + R7/R6)
This may appear somewhat complex, but with the part numbers indicated the time interval can be set as long as 100 C1. Here C1 is in microfarads, let's say if C1 is selected as 1 µ then the output time interval will be 100 seconds.
It is very clear from the equation that it is possible to vary the timing interval linearly by substituting R2 with a 1 M potentiometer, or logarithmically by using a 10 k pot in place of R6 and R7.