The article explains a solid state switch-mode mains voltage stabilizer circuit without relays, using a ferrite core boost converter and a couple of half-bridge mosfet driver circuits. The idea was requested by Mr. McAnthony Bernard.
Of late i started looking at voltage stabilizers use in house hold to regulate utility supply, boosting voltage when utility low and stepping down when utility is high.
It is built around mains transformer(iron core) wound in auto transformer style with many taps of 180v, 200v , 220v , 240v 260v etc..
the control circuit with the help of a relays selects the right tap for output. i guess you familiar with this device.
I started thinking to implement the function of this device with SMPS . Which will have the benefit of giving out constant 220vac and stable frequency of 50hz without using relays.
I have attach in this mail the block diagram of the concept.
Please let me know what you think, if it makes any sense going that route.
Will it really work and serve same purpose? .
Also i will need your help in the high voltage DC to DC converter section.
The proposed solid state ferrite core based mains voltage stabilizer circuit without relays may be understood by referring to the following diagram and the subsequent explanation.
RVCC = 1K.1watt, CVCC = 0.1uF/400V, CBOOT = 1uF/400V
The figure above shows the actual configuration for implementing a stabilized 220V or 120V output regardless of the input fluctuations or an over load by using a couple of non-isolated boost converter processor stages.
Here two half bridge driver mosfet ICs become the crucial elements of the whole design. The ICs involved are the versatile IRS2153 which were designed specifically for driving mosfets in a half bridge mode without the need of complex external circuitry.
We can see two identical half bridge driver stages incorporated, where the left side driver is used as the boost driver stage while the right hand side is configured for processing the boost voltage into a 50Hz or 60Hz sine wave output in conjunction with an external voltage control circuit.
The ICs are internally programmed to produce a fixed 50% duty cycle across the output pinouts through a totem pole topology. These pinouts are connected with the power mosfets for implementing the intended conversions. The ICs are also featured with an internal oscillator for enabling the required frequency at the output, the rate of the frequency is determined by an externally connected Rt/Ct network.
Using the Shut Down Feature
The IC also features a shut down facility which can be used to stall the output in an event of an over current, over voltage or any sudden catastrophic situation.
For more info on this half bridge driver ICs, you may refer to this article: Half-Bridge Mosfet Driver IC IRS2153(1)D - Pinouts, Application Notes Explained
The outputs from these ICs are extremely balanced owing to a highly sophisticated internal bootstrapping and dead time processing which ensure a perfect and safe operation of the connected devices.
In the discussed SMPS mains voltage stabilizer circuit, the left side stage is used for generating around 400V from a 310V input derived by rectifying the mains 220V input.
For a 120V input, the stage may be set for generating around 200V through the shown inductor.
The inductor may be wound over any standard EE core/bobbin assembly using 3 parallel (bifilar) strands of 0.3mm super enameled copper wire, and approximately 400 turns.
Selecting the Frequency
The frequency should be set by correctly selecting the values of the Rt/Ct such that a high frequency of about 70kHz is achieved for the left boost converter stage, across the shown inductor.
The right hand side driver IC is positioned to work with the above 400V DC from the boost converter after appropriate rectification and filtration, as may be witnessed in the diagram.
Here the values of the Rt and Ct is selected for acquiring approximately 50Hz or 60Hz (as per the country specs) across the connected mosfets output
However, the output from the right side driver stage could be as high as 550V, and this needs to be regulated to the desired safe levels, at around 220V or 120V
For this a simple opamp error amplifier configuration is included, as depicted in the following diagram.
Over Voltage Correction Circuit
As shown in the above diagram, the voltage correction stage utilizes a simple opamp comparator for the detection of the over voltage condition.
The circuit needs to be set only once in order to enjoy a permanent stabilized voltage at the set level regardless of the input fluctuations or an overload, however these may not be exceeded beyond a specified tolerable limit of the design.
As illustrated the supply to the error amp is derived from the output after appropriate rectification of the AC into a clean low current stabilized 12V DC for the circuit.
pin#2 is designated as the sensor input for the IC while the non-inverting pin#3 is referenced to a fixed 4.7V through a clamping zener diode network.
The sensing input is extracted from an unstabilized point in the circuit, and the output of the IC is hooked up with the Ct pin of the right side driver IC.
This pin functions as the shut down pin for the IC and as soon as it experiences a low below 1/6th of its Vcc, it instantly blanks out the output feeds to the mosfets shutting down the proceedings to a stand still.
The preset associated with pin#2 of the opamp is appropriately adjusted such that the output mains AC settles down to 220V from the available 450V or 500V output, or to 120V from a 250V output.
As long as the pin#2 experiences a higher voltage with reference to pin#3, it continues to keep its output low which in turn commands the driver IC to shut down, however the "shutting down" instantly corrects the opamp input, forcing it to withdraw its output low signal, and the cycle keeps self correcting the output to the precise levels, as determined by the pin#2 preset setting.
The error amp circuit keeps stabilizing this output and since the circuit has the advantage of a significant 100% margin between the input source volatge and the regulated voltage values, even under extremely low voltage conditions the outputs manages to provide the fixed stabilized voltage to the load regardless of the voltage, the same becomes true in a case when an unmatched load or an overload is connected at the output.
Improving the above Design:
A careful investigation shows that the above design can be modified and improved greatly to increase its efficiency and output quality:
- The inductor is actually not required and can be removed
- The output must be upgraded to a full bridge circuit so that the power is optimal for the load
- The output must be a pure sinewave and not a modified one as may be expected in the above design
All these feature have been considered and taken care of in the following upgraded version of the solid state stabilizer circuit:
- IC1 works like a normal astable multivibrator oscillator circuit, whose frequency can be adjusted by changing the value of R1 appropriately. This decides the number of "pillars" or "chopping" for the SPWM output.
- The frequency from IC 1 at its pin#3 is fed to to pin#2 of IC2 which is wired as a PWM generator.
- This frequency is converted into triangle waves at pin#6 of IC2, which is compared by a sample voltage at pin#5 of IC2
- Pin#5 of IC2 is applied with sample sinewave at 100 Hz frequency acquired from the bridge rectifier, after appropriately stepping down the mains to 12V.
- These sinewave samples are compared with the pin#7 triangle waves of IC2, which results in a proportionately dimesnioned SPWM at pin#3 of IC2.
- Now, the pulse width of this SPWM depends on the amplitude of the sample sinewaves from the bridge rectifier. In other words when the AC mains voltage is higher produces wider SPWMs and when the AC mains voltage is lower, it reduces the SPWM width and makes it narrower proportionately.
- The above SPWM in inverted by a BC547 transistor, and applied to the gates of the low side mosfets of a full bridge driver network.
- This implies that when the AC mains level will drop the response on the mosfet gates will be in the form of proportionately wider SPWMs, and when the AC mains voltage increases the gates will experience a proportionately deteriorating SPWM.
- The above application will result in a proportionate voltage boost across the load connected between the H-bridge network whenever input AC mains drops, and conversely the load will go through a proportionate amount voltage drop if the AC tends to rise above the danger level.
How to Set up the Circuit
Determine the approximate center transition point where the SPWM response may be just identical to mains AC level.
Suppose you select it to be at 220V, then adjust the 1K preset such that the load connected to the H-bridge receives approximately 220V.
That's all, the set up is complete now, and the rest will be taken care of automatically.
Alternatively, you can fix the above setting towards the lower voltage threshold level in the same manner.
Suppose the lower threshold is 170V, in that case feed a 170V to the circuit and adjust the 1K preset until you find approximately 210V across the load or between the H-bridge arms.
These steps concludes the setting up procedure, and the rest will automatically adjust as per the input AC level alterations.
Important: Please connect a high value capacitor in the order of 500uF/400V across the AC rectified line fed to the H-bridge network, so that the rectified DC is able to reach upto 310V DC across the H-bridge BUS lines.