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H-Bridge Inverter Circuit Using 4 N-channel Mosfets

H-Bridge Inverter Circuit Using 4 N-channel Mosfets

The following post describes an H-bridge modified sine wave inverter circuit using four n-channel mosfets. Let's learn more about the circuit functioning.

The H-Bridge Concept

We all know that among the different inverter typologies, the H-bridge is the most efficient one, since it does not necessitate the use of center tap transformers, and allows the use of transformers with two wires. The results become even better when four N-channel mosfets are involved.

With a two wire transformer connected to an H-bridge means the associated winding is allowed to go through the push pull oscillations in a reverse forward  manner. This provides better efficiency as the attainable current gain here becomes higher than the ordinary center tap type topologies.

However better things are never easy to get or implement. When identical type mosfets are involved in an H-bridge network, driving them efficiently becomes a big problem. It is primarily due to the following facts:

As we know an H-bridge topology incorporates four mosfets for the specified operations. With all four of them being N-channel types, driving  the upper mosfets or the high side mosfets becomes an issue.

This is because during conduction the upper mosfets experience almost the same level of potential at their source terminal as the supply voltage, due to the presence of the load resistance at the source terminal.

That means the upper mosfets come across similar voltage levels at their gate and source while operating.

Since as per the specs, the source voltage must be close to the ground potential for efficient conduction,  the situation instantly inhibits the particular mosfet from conducting, and the entire circuit stalls.

In order to switch the upper mosfets efficiently  they must be applied with a gate voltage at least 6V higher than the available supply voltage.

Meaning if the supply voltage is 12V, we would require at least 18-20V at the gate of the high side mosfets.

Using 4 N-Channel Mosfets for the Inverter

The proposed H-bridge inverter circuit having 4 n channel mosfets tries to overcome this problem by introducing a higher voltage bootstrapping network for operating the high side mosfets.

N1, N2, N3, N4 NOT gates from the IC 4049 are arranged as a voltage doubler circuit, which generates about 20 volts from the available 12V supply.

This voltage is applied to the high side mosfets via a couple NPN transistors.

The low side mosfets receive the gate voltages directly from the respective sources.

The oscillating (totem pole) frequency is derived from a standard decade counter IC, the IC 4017.

We know that the IC 4017 generates sequencing high outputs across its specified 10 output pins. The sequencing logic shuts subsquently as it jumps from one pin to the other.

Here all the 10 outputs are used so that the IC never gets a chance of producing incorrect switching of its output pins.

The groups of three outputs fed to the mosfets keep the pulse width to reasonable dimensions. The feature also provides the user the facility of tweaking the pulse width that's being fed to the mosfets.

By reducing the number of outputs to the respective mosfets, the pulse width can be effectively reduced and vice versa.

This means the RMS is tweakable here to some extents, and renders the circuit a modified sine wave circuit ability.

The clocks to the IC 4017 is taken from the bootstrapping oscillator network itself.

The oscillating frequency of the bootstrapping circuit is intentionally fixed at 1kHz, so that it becomes applicable for driving the IC4017 also, which ultimately provides about 50 Hz output to the connected 4 N-channel H bridge inverter circuit.

The proposed design can be much simplified as given here:



The next simple full bridge or half-bridge modified sine wave inverter was also developed by me. The idea does not incorporates 2 P channel, and 2 n channel mosfets for the H-bridge configuration and effectively implements all the necessary functions flawlessly.

IC 4049 pinouts

How the Inverter Circuit is Configured Stage-wise

The circuit may be basically divided into three stages, viz. The oscillator stage, the driver stage and the full bridge mosfet output stage.

Looking at the shown circuit diagram, the idea can be explained with the following points:

IC1 which is the IC555 is wired in its standard astable mode, and is responsible for generating the required pulses or the oscillations.

The values of P1 and C1 determines the frequency and the duty cycle of the generated oscillations.

IC2 which is a decade counter/divider IC4017, performs two functions:  optimization of the waveform and providing a safe triggering for the full bridge stage.

Providing a safe triggering for the mosfets is the most important function which is performed by IC2. Let's learn how it's implemented.

How the IC 4017 is Designed to Work

As we all know the the output of IC4017 sequences in response to each rising edge clock applied at its input pin#14.

The pulses from IC1 initiates the sequencing process such that the pulses jump from one pin out to the other in the following order: 3-2-4-7-1. Meaning, in response to the fed each input pulse the output of the IC4017 will become high from pin#3 to pin#1 and the cycle will repeat as long as the input at Pin#14 persists.

Once the output reaches pin#1 it's reset via pin#15, so that the cycle can repeat back from pin#3.

At the instant when pin#3 is high, nothing conducts at the output.

The moment the above pulse jumps to pin#2 it becomes high which switches ON T4 (N-channel mosfet responds to positive signal), simultaneously transistor T1 also conducts, it's collector goes low which at the same instant switches ON T5, which being a P-channel mosfet responds to the low signal at T1's collector.

With T4 and T5 ON, current passes from the positive terminal through the involved transformer winding TR1 across to the ground terminal. This pushes the current through TR1 in one direction (from right to left).

At the next instant, the pulse jumps from pin#2 to pin#4, since this pinout is blank, once again nothing conducts.

However when the sequence jumps from pin#4 to pin#7, T2 conducts and repeats the functions of T1 but in the reverse direction. That is, this time T3 and T6 conduct switching the current across TR1 in the opposite direction (from left to right). The cycle completes the H-bridge functioning successfully.

Finally, the pulse jumps from the above pin to pin#1 where it's reset back to pin#3 and the cycle keeps repeating.

The blank space at pin#4 is the most crucial, as it keeps the mosfets entirely safe from any possible "shoot through" and ensures a 100% flawless functioning of the full bridge avoiding the need and involvement of complicated mosfet drivers.

The blank pinout also helps to implement the required typical, crude modified sine wave-form, as shown in the diagram.

The transfer of the pulse across the IC4017 from its pin#3 to pin#1 constitutes one cycle, which must repeat 50 or 60 times in order to generate the required 50 Hz or 60 Hz cycles at the output of TR1.

Therefore multiplying the number of pinouts by 50 gives 4 x 50 = 200 Hz. This is the frequency that must be set at the input of IC2 or at the output of IC1.

The frequency may be easily set with the help of P1.

The proposed full bridge modified sine wave inverter circuit design may be modified in numerous different ways as per individual preferences.

Does the mark space ratio of IC1 have any effect on the pulse features?....thing to ponder about.

 Circuit Diagram

H-bridge simple modified sine wave inverter circuit

Parts List

R2, R3, R4, R5 = 1K

R1, P1, C2 = needs to be calculated at 50Hz using this 555 IC calculator

C2 = 10nF

T1, T2 = BC547

T3, T5 = IRF9540
T4, T6 = IRF540

IC1 = IC 555

IC2 = 4017

Assumed Waveform



About the Author

I am an electronic engineer (dipIETE ), hobbyist, inventor, schematic/PCB designer, manufacturer. I am also the founder of the website: https://www.homemade-circuits.com/, where I love sharing my innovative circuit ideas and tutorials. If you have any circuit related query, you may interact through comments, I'll be most happy to help!

50 thoughts on “H-Bridge Inverter Circuit Using 4 N-channel Mosfets”

  1. Hello, good afternoon, my name is Carlos from Argentina, I am a faithful follower of the website. I want to build the inverter with lm555 and cd4017 with bridge H and 4 mosfet .. The question is I have a transformer of 12v x 15 amps without central cover how much power I will have output .. Thank you very much.
    Atte: Carlos from Argentina

  2. Can u explain me sir nand gate in ic 4049 with their pin number… Means which pin number 1,2,3,4…so on…because i can not find which pin 1 and which pin 10 and so on…

  3. dear Sir, how i control my inverter output voltage level. my inverter output voltage is 330 volt but i want 240 volt. please tell me about that. thanks

  4. hii Mr. Swagatam… I have checked my HCF4049UBE on the google and found of its vdd is 10V, so .. this device still can be used for 12V vdd or needed to regulate it to 9V or should i go for 4049 with the specification more high (15V) VDD ??

    • Hi Mr.Hui, the IC HCF4049UBE is specified to work with supplies from 3 to 20V, so it can be used safely with a 12V supply, just as any other IC 4049 variant

    • ow.. im sorry.. may be i little careless to see datasheet.. after i saw next page .. yess.. ur right sir the voltage supply is so wide .. .. i have been tricked with vdd 10v has pF ..on the first page.. i will careful next time.thx , sir..

  5. Dear Swagatam Sir,

    I tried to use 2 N MOS and 2 PMOS for inverter circuit.I used IRF540 and IRF 9540.But when I increase the supply voltage beyond 8 V,the current increases abruptly and my DC voltage source get shorted.Can you please figure out the problem?

    • Dear Faris, it will be difficult to troubleshoot because an H-bridge using N and P mosfets can be extremely unpredictable, that's why the use of specialized H bridge driver IC is recommended for implementing such topologies safely…

  6. Hi swagatam
    I put another diode on each leg of the 4017 outputs ie:2,4,7,10 and 5,6,9,11 and the output voltage rose to 220v.
    When i put a load(4w) on the voltage drops considerably even after increasing the trafo wattage from 12w to 120w i still get quiet a big voltage drop, now to prevent this voltage drop would puting fet's in parrallel(ie doubling up on the mosfets) so as to entice more current to flow through the trafo solve the problem?
    And would the 4017 ic be able to switch for instance 8 mosfets comfortably

    • Hi Robin,

      If you are using a 120 watt transformer with a 100Ah battery and fets specified to carry currents above 20 amps then the voltage should not drop unless the load exceeds 120 watts.

      so i don't think paralleling the mosfets would improve the results because the problem could be somewhere else.

      yes the 4017 outputs and the BJTs are all capable enough to make any msfet trigger fully since the gate impedance of an FET is very high,

      May be you could switch to a professional full bridge design using a single IC fully bridge driver as explained here:


  7. Hi Swagatam
    The moment i connected a trafo i relized the fets were still not switching

    I replaced the 1k resistor that i removed from the voltage doubler to the 557 emitter with a 100k resistor and got 23.5v at the emitter(which i think is correct?)But now it does'nt switch through to the collector.Remember previously i just had a wire.
    I need that voltage to switch through to the collector and thus the High/side fet gates
    Shoo,but i think we're getting there

    • Hi Robin,

      you may have to check the stages separately.

      first disconnect the bases of the mosfets from the transistors, next disconnect pin14 from the 4049 clock and feed the clocks from an external oscillator at a very slow rate, may be at around 0.5 Hz.

      Next, you can confirm whether the transistors are providing the required voltages at the intended levels over the indicated points or not.

      Once this is confirmed then you can integrate the mosfets and continue checking the results without altering the 0.5 Hz sequence rate.

      If there's any fault somewhere the above method will be able to trace it out.

  8. Hi Swagatam
    Just one other thing,the Zener diode part seems to bring the voltage down so i left that out and connected directly to the battery

    • Hi Swagatam
      I had my oscilloscope on ac instead of dc for channel 1 therefore could'nt pick up the voltage doubler reading(big mistake lots of time wasted)

      Ok i got the fet's switching 100%,Trafo used=12W {220v in and 12vac 1000ma out}.
      output voltage=180v if i used trafo=220 in and 9v out i would've got higher output voltage
      I will e-mail you the images of 1) low/side fet gate voltages
      2)high/side fet gate voltages
      3)trafo output waveform(there are 6*10k resistors across the output,so i put the scope over one 10k)
      I will e-mail you the images immediately

    • OK no issues Robin, you are doing a great job

      so far it's been very interesting, let's see what finally transpires from the efforts.

      yes a 0-9V trafo would surely yield the required 230V

  9. Hi Swagatam
    I got the fets switching properly now,I removed the 1k resistor from the voltage doubling circuit to the bc557 emitter and put a wire there.I didnt get any voltage there but got 21.2v at the collector.
    In the other H-bridge circuit there is a resistor there,maybe there should'nt be?
    There is an extra resistor at the top right high-side fet which i left out.
    I'll do some further testing tomorrow

  10. hi swagatam,
    thank you for sharing your knowledge
    I have implemeted your circuit but it has some problems.
    the first is oscillating frequency. How 1 khz on the 4017 ic will be 50 hz on the h bridge?

    The second is that the output is 220 volt ac without load but with load the volt decreases suddenly to 40 volt ac.
    How could I preserve the volt with load?

    • Hi Ahmed,

      I have divided the 1khzwith the total number of outputs used from the IC 4017, so 1000/10 = 100Hz, and this fvrequency when divided across two mosfet arms gives 50Hz.

      You can adjust it as per your own calculations if the above results look incorrect.

      The output voltage will depend on trafo wattage and battery AH capacity, they must be sufficiently rated well above the load wattage, otherwise it will drop proportionately.

  11. ok sir thank you but sir please im still in the 4049 some of the pins is not shown in the circuit such as pin8 and pin16 i can see the pin8 is gnd or ground please sir where is the pin16 connect to? that is all my problem im looking forward to hear from you.

  12. hi sir in this circuit i want to ask you that the IC4049 please sir is N1 start from (2 to 3) and (N2 4 to 5) up to 15? i guess you are understand what i mean cos im confused about it i build it but it don't work that is why im asking maybe i didn't connected the pins correctly thank you sir im looking forward to hear from you son.

    • Hi bianzz, all gates inside the 4049 are identical so you can organize them as per your choice, only the input and outut pins of the selected gates needs to be connected correctly as per the diagram.
      check the datasheet of this IC you will get the idea regarding the involved gate pinouts.

  13. hi swagatam
    this is srinivas cani use this design for 3kva transformer (0-36 volts)220volt out put,please suggest me


  14. Hi, Swag,
    I am have built an inverter but the problem lies in the charging area in that when there is power from the mains and the inverter is charging, do we have to build a different charger for the inverter or we should allow the power mosfet to charge the battery.
    Also what are the side effect of charging with the mosfet. And is it advisabe to build a different charger for the inverter.


    • Hi Itoro,

      Which circuit are you referring too?
      All inverters mostly use a separate transformer or winding for charging.
      Without actually inspecting the circuit it will be difficult for me to comment precisely.

  15. using solar panel as input can i get 600W at output side in this inverter circuit…??
    and what should be the circuit and specification of transformer and solar panel….???

    • for 600 watts, the solar panel must be at least 200 watts rated and the transformer at 800 watts.

      The battery should have minimum current capacity of 200ah.

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