Long duration timer circuits normally involve ICs for the processing because executing long duration delays requires high precision and accuracy which is possible only using ICs.
Even our very own IC 555 becomes helpless and inaccurate when long duration delays are expected from it.
The encountered difficulty for sustaining high accuracy with long durations is basically the leakage voltage issue and the inconsistent discharging of the capacitors which leads to wrong starting thresholds for the timer producing errors in the timing for each cycles.
The leakages and inconsistent discharge issues become proportionately bigger as the capacitor values get bigger which becomes imperative for obtaining long intervals.
Therefore making a long duration timers with ordinary BJTs could be almost impossible as these devices alone could be too basic and cannot be expected for such complex implementations.
However the following transistor circuit handles the above discussed issues credibly and can be used for acquiring long duration timing with reasonably high accuracy (+/-2%)
The circuit may be understood with the help of the following discussion:
A momentary push of the push button charges the 1000uF capacitor fully and triggers the NPN BC547 transistor, sustaining the position even after the switch is released due to the slow discharging of the 1000uF via the 2M2 resistor and the emitter of the NPN.
Triggering of the BC547 also switches ON the PNP BC557 which in turns switches ON the relay and the connected load.
The above situation holds on as long as the 1000uF is not discharged below the cut off levels of the the two transistors.
The above discussed operations are quite basic and make an ordinary timer configuration which may be too inaccurate with its performance.
However the addition of the 1K/1N4148 network instantly the transforms the circuit into a hugely accurate long duration timer for the following reasons.
The 1K and the 1N4148 link ensures that each time the transistors break up the latch due to insufficient charge in the capacitor, the residual charge inside the capacitor is forced to discharge fully through the above resistor/diode link via the relay coil.
The above feature makes sure that the capacitor is completely drained off and empty for the next cycle and thus is able to produce a clean start from zero.
Without the above feature the capacitor would be unable to discharge completely and the residual charge inside would induce undefined start points making the procedures inaccurate and inconsistent.
The circuit could be even further enhanced by using a Darlington pair for the NPN allowing the use of much higher value resistors at its base and proportionately low value capacitors. Lower value capacitors would produce lower leakages and help to improve the timing accuracy during the long duration counting periods.