In this post I have explained a simple IC 555 based self optimizing solar battery charger circuit with buck converter circuit that automatically sets and adjusts the charging voltage in response to the fading sunlight conditions, and tries to maintain an optimal charging power for the battery, regardless of the sun ray intensities.
Using a PWM Buck Converter Design
The attached PWM buck converter ensures an efficient conversion so that the panel is never subjected to stressful conditions.
I have already discussed one interesting solar PWM based MPPT type solar charger circuit, the following design may be considered an upgraded version of the same as it includes a buck converter stage making the design even more efficient than the previous counterpart.
Note: Please connect a 1K resistor across pin5 and ground of IC2 for correct functioning of the circuit.
The proposed self optimizing solar battery charger circuit with buck converter circuit may be grasped with the help of the following explanation:
The circuit consists of three basic stages viz: the PWM solar voltage optimizer using couple of IC 555s in the the form of IC1 and IC2, the mosfet PWM current amplifier and the buck converter using L1 and the associated components.
IC1 is rigged to produce a frequency of about 80 Hz while IC2 is configured as a comparator and PWM generator.
The 80 Hz from IC 1 is fed to pin2 of IC2 which utilizes this frequency for manufacturing triangle waves across C1.... which are further compared with the instantaneous potentials at its pin5 for dimensioning the correct PWMs at its pin3.
The pin5 potential as may be seen in the diagram, is derived from the solar panel through a potential divider stage and a BJT common collector stgae.
The preset positioned with this potential divider is initially appropriately adjusted such that at the peak solar panel voltage the output from the buck converter produces the optimal magnitude of voltage suiting the connected battery's charging level.
Once the above is set rest is handled automatically by the IC1/IC2 stage.
During peak sunlight the PWMs get appropriately shortened ensuring minimum stress on the solar panel yet producing the correct optimal voltage for the battery due to the presence of the buck converter stage (a buck boost type of design is the most efficient method of reducing a voltage source without stressing the source parameters)
Now, as the sun light begins diminishing the voltage across the set potential divider also begins to drop proportionately which is detected at pin5 of IC2....on detecting this gradual deterioration of the sample voltage IC2 begins widening the PWMs so that the buck output is able to maintain the required optimal battery charging voltage, this implies that the battery continues to receive the correct amount of power regardless of the sun's retarding illumination.
L1 should be dimensioned appropriately such that it generates the approximate optimal voltage level for the battery when the solar panel is at its peak specification or in other words when the sunlight is in the most favorable position for the solar panel.
RX is introduced for determining and restricting the maximum charging current limit for the battery, it may calculated with the help of the following formula:
Rx = 0.7 x 10 / Battery AH
How to set up the above self optimizing solar battery charger circuit with buck converter circuit.
Suppose a 24 V peak solar panel is selected for charging a 12 V battery, the circuit may be set as instructed below:
Initially do not connect any battery at the output
Connect 24 V from an external C/DC adapter across the points where the solar panel input is required to be fed.
Connect a 12 V for the IC1/IC2 circuit from another AC/DC adapter.
Adjust the potential divider 10k preset until a potential of around 11.8 V is achieved at pin5 of IC2.
Next, through some trial error tweak and optimize the number of turns of L1 until a 14.5 V is measured across the output where the battery is required to be connected.
That's all! the circuit is now set and ready to be used with the intended solar panel for getting an optimized highly efficient PWM buck based charging procedures.
In the above self optimizing solar battery charger circuit with buck converter circuit I have tried to implement and extract an oppositely varying voltage and current output from the the circuit with respect to the sunlight, however a deeper investigation made me realize that actually it should not be responding oppositely rather corresponding to the sun light.
Because in MPpT we want to extract maximum power during the peak hour while also ensuring that the load does not hog the panel and its efficiency.
The following revised diagram now makes a better sense, let's try to analyze the design quickly:
In the above updated design I have made the following important change:
I have added a NPN inverter at pin3 of IC 2 so that now the PWMs from IC 2 influences the mosfet to extract maximum power from the panel and reduces the power gradually as the sun light diminishes.
The PWM pulses along with the buck converter guarantees a perfect compatibility and maximum power extraction from the panel, but diminishes gradually in response to the sun's diminishing intensity.
However, the above set up makes sure about one important aspect, it ensures a balanced input/output power ratio which is always a key issue in MPPT chargers.
Further if in case the load tries to extract an excessive amount of current, the BC557 current limiter immediately comes into action preventing the disruption of the smooth functioning of the MPPT by cutting off power to the load during those periods.
Update
Contemplating the Finalized Design of an MPPT Circuit
After going through rigorous further assessments, I could finally conclude that the second theory discussed above cannot be correct. The first theory makes more sense since an MPPT is meant solely to extract and convert the extra volts into current that may be available from a solar panel.
For example suppose if the solar panel had 10V more than the load specs, then we would want to channelize this extra voltage to the buck converter through PWMs such that the buck converter is able to produce the specified amount of voltage to the load without loading any of the parameters.
In order to implement this, the PWM would need to be proportionately thinner while the sun was at the peak and releasing the extra volts.
However, as the sun power diminished, the PWMs would be required to broaden so that the buck converter was continuously enabled with the optimal amount of power for supplying the load at the specified rate regardless of the sun intensity.
To allow the above procedures to happen smoothly and optimally, the first design appears to be the most appropriate one and the one that could fulfill the above requirement correctly.
Therefore the second design could be simply discarded and the first design finalized as the correct 555 based MPT circuit.
I did not find it appropriate to delete the second design because there are various comments that seems to be linked with the second design, and removing it could make the discussion confusing for the readers, therefore I decided to keep the details as is and clarify the position with this explanation.
Questions & Answers
Hi, Can i use wind turbine and solar panel pluged in parallel?
Hi, yes it can be done through separate bridge rectifiers for the two sources.
Can you show me how should I modify your schematic to work?
you will have to make two bridge rectifier networks using appropriately rated diodes. Next, make the positives and the negatives of these rectifiers common and connect them with the input of the above circuit.
After this you can integrate the outputs of the wind turbine and solar panel to the inputs of the two bridge rectifiers….I hope you got it.
hello Mr swagatam all the best for the new year sir if I am using a n channel fet insted and do the modification in connections as u staled in anothe post what type of transistor should I use as current limitor on connected on the source side of the fet same PNP or use a NPN . thank u
Hello unknown, it's better to go with a P channel because using an Nchannel will require quite a few modifications to be done….it'll be difficult for me to explain it here, if possible I'll try to update the article with a Nchannel version.
hello Mr Swagatam I got the p channel today I would like to tell u the results I got because i dont know if this is normal I conect the fet just as how u design it on the circuit I can vary the voltage on the gate of the fet yes but I realise even when the gate voltage is 0 volts the battery is still getting some voltage to charge the battery is this normal. When I use a n channel and connect it as how u connect the fet in the I/V mppt when gate voltage is 0 volt no voltage goes accross to charge the battery please help me here Sir thank you Alex
hello unknown,
with higher voltage at pin5 the pin3 of IC2 will generate wider PWMs which will constrict the P fet conduction causing it to produce lesser amount of voltage and with lower voltage at pin5 it will become the opposite proportionately.
the idea is to derive more conduction from the P fet as the sun goes down and vice versa…so at 0 volts the PWMs will be narrowest allowing the P channel to conduct fully and therefore it will conduct whatever voltage is applied across its source…
Thank u Mr swagatam for ur reply I just understnd how the P channel fet works now in this circuit u are trying to let the panel work at abetter voltage even when the sunlight is lower . So when I am getting charge voltage even at 0 volt on the gate is normal Sir. I will recheck it again tomorrow because I think this thing can work Sir.In ur last reply I am not too clear on ur explanation of the collector voltage on the npn transistor . If its the one that gets the signal from the panel network resistors well this collector is connected to the regulator v please clear me up on this . Thank u Alex
yes that's correct, the idea is to get a self adjusting/optimizing output from the panel such that a constant voltage is achieved regardless of the changing sun intensity, and simultaneously making sure the panel does not get loaded inefficiently…
thank u Mr Swagatam for your reply. I did not have any P channel at the moment so I did a modification and used a n channel configured as how u did it in the I/V tracker circuit with source going to ground and drain going to battery negative.I am trying to understand the concept. When the sun is at its fullest I should adjust the pot to get about 11v at pin 5 I asume up to 14v max is this correct sir. When the sunshine decreases this voltage will also decrease which causes the fet to be less fully on is this correct. If my understanding is wrong please correct me here Sir. If I build the first circuit with just the resistor network and pot I am able to adjust the voltage from 0 to 12v on the gate fine when I use the npn transistor I am not able to adjust from 0 but from about 9v to 12v sir so I amwondering if something is wrong with the config Sir. , First i did the test manually I used a 10k varable pot network connected to the 12v and ground using the centre tap conected to pin 5 and I am able to vary and find an optimal point for the panel so is just to get the circuit to work from the network resistors connected to the panel sir As soon as u help me out here I am able to tell u and everyone the results. Thank u Sir i await your re[ply
check the voltage at the collector of the NPN.it should decrease as the pin5 voltage is increased and vice versa due to bigger PWMs at the base of the NPN.
decreasing voltage at the collector of the NPN will proportionately force the N channel to conduct lesser and produce lesser voltage for the battery and vice versa.
Meaning when the sun light diminishes the N channel will conduct proportionately more ensuring a proportionate increase in the charging voltage for the battery as the sun light goes down…and vice versa.
thank u MR Swagataam I tried again today with the P channel The results are like this without using the npn transistor from the panel network resistors I can vary the gate voltage from 0 to about 12v on the gate of the fet. When ever I put the npn transistor in place I can only vary from 9v up to 12v on the gate although the base voltage which is coming from the panel network is being varied from 0 to 12v. there is this constant 9v at the emmiter of this transitor which goes on to the gate of the fet and I think this is not right . Please correct me on this Sir. Alex
Alex, a NPN is required only if an Nfet is used at the control stage…with a P channel fet the gate can be directly connected to the IC2 pin 3 as shown in the diagram, otherwise it'll give opposite and undesirable results
thank u mR Swagatam I am not speaking about that transistor to drive the gate I am talking about the transistor on the left that is connected between the PANEL resistor network and the pin 5 Sir. On the emmiter I have 9v minimum and this can vary up to 12v and this is what is happening to the gate voltage. While on the base of this transistor the voltage is varying according to the pot from zero to 12 Sir so I am asking if this is normal because this 9v constant on the gate of the fet will cause it to conduct according to this v I suppose. Please help me here sir. Thank u Alex
OK I got it, it's happening due to the 555 internal resistor set up, which is holding the level to 2/3 Vcc….do this, add a 1K resistor across pin5 and ground and check the response….
ok Mr swagatam I did some more tests today with a P channel fet and got some better results , I see where u say as the sunshine increases the voltage on the gate would increase causing the fet to conduct less and visi versa. This principle should work Sir. what I want to understand fully, is it that say a panel gives maximum current at a certain voltage when charging a battery.So if I can turn that pot when the sun is at its peak and find that spot with a watt meter and set it there then the rest of lower setting would autommatically fall in place as the sunshine goes down still finding the best spot for the panel to work in .Just want to know if I get the concept right. Thank u and waiting for ur reply on this post and the others before.
Hello Alex, yes you can try that…
hello Mr Swagatam we really appreciate your simple way of teaching us the things that look so difficult and impossible. Today I really found out that optimising your panel at the better working voltage works Sir. I used a bulb to conect straight to the panel the bulb came on but the volt went down to about 6.5v this was really in the evening. I connect the bulb at the output of the mppt circuit above and was able to get a brighter light from the bulb and this time it was optimaised at 12.8v so u see that your concept will work Sir. The only the problem I am having is to get a smooth adjustment at the gate of the fet Sir and remember I am using a N channel in the design.I can get a smooth adjustment from about 0 to 9v but between 9 and 11 its hard to get a smooth adjustment so right here the panel voltage will jump from about 25 to 29v I am using 35v panel to charge 24v bank . This is happening at the gate of the fet At the pot there is smooth adjusment right on to pin5 and I find out that right about here is the optimal point on the panel just about 26 to 28v. I am using the modification u recomend using a npn transistor to the gate of the fet to change around the opposite voltage change Sir. Please tell me what u thinkcould be the problem before I proceed further . Thank u
hello Alex, It will be difficult to assess this problem without practically seeing it, are you sure your pot is alright?
Or you can try adding a 1K pot in series with 10k pot ground terminal, this can be used for fine tuning at the rough area.
Thank u Mr Swagatam one quick question sir if I am using N CHANNEL fet do I still have to use the npn transistor that connects from the panel resistor network divider and connects to pin 5 or I can run it straight (Using N channel Fet )
Mr. Alex, yes you'll have to include the transistor under all circumstances, it is there to increase the current response at pin5 ……otherwise pin5 will not respond properly.
ok sir thank u I got that part right and added the 1k resistor from pin 5 to ground to bring the 9v which i had on pin 5 .I also added the other transistor from pin 3 to the gate of the fet and this also respond correctly. only where I need the fine tune but I will work on that Now the circuit is complete just to do a proper adjustment on the gate voltage setting with the pot to get it to work in the optimised panel voltage. I am wondering if I use a watt meter at the peak of the sunshine to check the highest wattage I can achieve from the panel if this would be the same as setting up as how u describe above to do the setting up sir.
Mr swagatam could u give us some more detail on the coil about how many turns to start with thank u
you can begin with a 21 SWG, or a 0.6mm magnet wire, 20 to 30 turns wound over a ferrite ring, or if a ferrite ring is not available you can try it on any other suitable ferrite core, an EE core would be perfect.
check and optimize the voltage to the required charging level by adjusting the 10k pot, do this without connecting a battery.
you can also try replacing the pin5 1K resistor with a 1K pot for adjusting the above response, and for getting an optional tweaking facility…
make sure you connect a 100 ohm resistor in series with the 1K pot to safeguard the BC547
Thank u Mr Swagatam I will get the coil turns right tomorrow Sir. Please expand on the term optimise voltage. Is this the floating charge voltage of the connected battery or it is the voltage at which the panel will work best SIr please help me to get the full understanding here so ur design can be fully tested sir. what is this voltage for a 24v battery bank and 48v battery bank. I await ur replr thank u
Mr. Alex, by optimizing I mean setting up the correct charging voltage at the output regardless of the input voltage. For 12V it should be around 14.4V, for 24V it should be 28.8V and for 48V it should be 57.6V
Ok now i understand u Sir I will try that today and tell u the results and this should be set at the peak of the sunshine because if I am putting out more than this amount ov volt it would cause the panel to be loaded down and become less efficient sir alex
IMPORTANT I forgot to tell u Mr Swagatam that the problem I was having do a fine tune adjustment on the voltage. Today I found out that when the sun was gone down in the evening I was able to do a better fine tune adjustment on the voltage . Could this be a high current problem please look into tis Sir Alex thnak u
No it's not about high current, your buck converter may not be working correctly, it must be set correctly, the problem may be in this stage
hello Mr Swagatam I am back to report todays findings on the mppt.I am having some different effects maybe because I am using a slightly modified circuit to the above one Sir As I said I am using a n channel fet . The connection of the fet is just as how u connected it in the i/v tracker circuit https://www.homemade-circuits.com/2013/09/iv-tracker-circuit-for-solar-mppt.html source to ground and drain to -v of battery with + pole of battery going to + of panel. This is how it works I am not able to adjust the output voltage it is just sending out the full panel volts no matter the pot setting but on the other hand I am able to measure full open panel voltage right down to battery volt when it connects directly with the battery . This I can measure at the input of the mppt Sir so I just set it to 28.8v at full sunshine dont know if this process is right please correct me where I went wrong sir I await ur reply Alex
Thanks Alex, make sure your buck converter is working correctly, check it separately by supplying the voltage from a power supply instead of the panel and by applying some constant high frequency at the gate of the mosfet.
The number of turns should decide how much voltage you get at the output, it will be directly proportional.
Once this is done you can go ahead and check whether pin3 of IC2 is generating varying PWMs in response to a varying pin5 voltage
hello mr Swagatam have sent an email to u with the diagram please check this for me sir and see if there is any mistake . Thank u
hello Mr.Alex, your NPN/FET connections with pin3 of IC2 are correct but the buck circuit is wrongly done
thank u Mr Swagatam could u send me the right connections Sir i would really appreciate this as early s possible I await ur reply on this Alex
Alex, you can use the buck circuit as shown in the diagram, just change the fet polarity, connect the source with the buck converter and drain with the solar panel.
….make sure the NPN transistor's collector resistor connects with the solar panel positive.
thank u Sir. Which npn transistor u are talking about . is it the one that drives the fet gate. If this is the one suppose I am using a 48v system I would have to change the resistor value . Right now it is connected to the regulator positive that supplys the rest of the ics sir is this right . I await ur reply thank u Alex
thank u sir tomorow I will try this connection please clarify the npn collector connections. Thank u Alex
Alex, yes that's right, make it 22k and connect it with panel positive.
Thank u Sir I will check it today and let u know
Alex
hello Mr Swagatam I sent you a drawing of the circuit please check to see if the connections are correct Sir thank u I await your reply Alex
hello alex, it's correct, just connect a 12V zener between collector and ground of the NPN transistor.
I can't understand why you connect the diode in series with the coil, it should be between source and ground as given in the diagram (BA159)
Thank u Mr Swagatam for the correction. I put the diode just because u had used it in one of ur circuits for reverse protection. I will soon try the new connection because right now I tried the old connection and I think I am getting some better results than when I connected the panels directly to the battery it is the first for a long time i see my batterys going to 54v plus i normally go like 52.6v so I have ordered a watt meter to actually see what is happening in real life Sir today when the sun was hottest the panels were putting out 58v there about.I think youe concept is right sir it will just take a few ddays to get the meter and then I can tell u exactly what is happening. I will just leave it again tommorow and see how well it works sir. So in my case using a Nchannel fet sir in the evening when the sun is weakest I should be getting about 10v at the GATE of the fet or more and in the mid day about how much because today I was getting about 11.4 at mid day and in the evening I was having about 12.2 dont know if this setting is right sir . I await ur reply . Thank u Alex
Mr Alex, according to me first you must confirm whether your buck converter is working correctly or nort, if it doesn't work correctly then you won't get the optimal effect from the design, so first check it separately using a 24V power supply, such that the buck outputs the required 14V from it, once this is done you may proceed with the 555 integration and the preset settings.
hello Mr Swagatam I think I saw u had a circuit of an i/v tracker that used a buck converter at the output not the transformer output . Could u send me the link sir . thank u alex
please type I/V tracker in the search box and you should be able to get it right away…
thank u Mr Swagatam . What i was askinng is if I should be having more than 10 v at the gates of the fet at any time in that this is the FULLY TURN ON VOLTAGE for the fet. The voltage at pin 5 is normally a bit higher than at the gate sir. I will check to make sure the buck converter is working as how u say it should work but please keep in mind I am working on 48v system sir Alex
Alex, a 48V panel will be able to produce at least 12V even under worst conditions, the gate would be receiving the voltage from the collector resistor of the NPN not from the 555 pin3, make sure you have added a zener diode across the collector and ground as explained earlier.