The following post shows how a full-bridge 1 KVA inverter circuit can be built using 4 N-channel mosfets, without incorporating complicated high side driver networks or chips.
The Full-Bridge Inverter Concept
Driving a full bridge mosfet network having 4 N-channel mosfets is never easy, rather it calls for reasonably complex circuitry involving complex high side driver networks.
If you study the following circuit which has been developed by me, you will discover that after all it's not that difficult to design such networks and can be done even with ordinary components.
We will study the concept with the help of the shown circuit diagram which is in the form of a modified 1 kva inverter circuit employing 4 N-channel mosfets.
As we all know, when 4 N-channel mosfets are involved in an H-bridge network, a bootstrapping network becomes imperative for driving the high side or the upper two mosfets whose drains are connected to the high side or the battery (+) or the positive of the given supply.
In the proposed design, the bootstrapping network is formed with the help of six NOT gates and a few other passive components.
The output of the NOT gates which are configured as buffers generate voltage twice that of the supply range, meaning if the supply is 12V, the NOT gate outputs generate around 22V.
This stepped up voltage is applied to the gates of the high side mosfets via the emitter pinouts of two respective NPN transistors.
Since these transistors must be switched in such a way that diagonally opposite mosfets conduct at a time while the the diagonally paired mosfets at the two arms of the bridge conduct alternately.
This function is effectively handled by the sequential output high generator IC 4017, which is technically called Johnson divide by 10 counter/divider IC.
The Bootstrapping Network
The driving frequency for the above IC is derived from the bootstrapping network itself just to avoid the need of an external oscillator stage.
The frequency of the bootstrapping network should be adjusted such that the output frequency of the transformer gets optimized to the required degree of 50 or 60 Hz, as per the required specs.
While sequencing, the outputs of the IC 4017 trigger the connected mosfets appropriately producing the required push-pull effect on the attached transformer winding which activates the inverter functioning.
The PNP transistor which can be witnessed attached with the NPN transistors make sure that the gate capacitance of the mosfets are effectively discharged in the course of the action for enabling efficient functioning of the entire system.
The pinout connections to the mosfets can be altered and changed as per individual preferences, this might also require the involvement of the reset pin#15 connection.
The above design was tested and verified by Mr. Robin Peter one of the avid hobbyists and contributor to this blog, the following waveform images were recorded by him during the testing process.